insufficient TLB flush for x86 PV guests in shadow mode For migration as well as to work around kernels unaware of L1TF (see XSA-273), PV guests may be run in shadow paging mode. To address XSA-401, code was moved inside a function in Xen. This code movement missed a variable changing meaning / value between old and new code positions. The now wrong use of the variable did lead to a wrong TLB flush condition, omitting flushes where such are necessary.
History

No history.

cve-icon MITRE

Status: PUBLISHED

Assigner: XEN

Published: 2022-07-26T00:00:00

Updated: 2024-08-03T08:09:22.681Z

Reserved: 2022-06-15T00:00:00

Link: CVE-2022-33745

cve-icon Vulnrichment

No data.

cve-icon NVD

Status : Modified

Published: 2022-07-26T13:15:10.003

Modified: 2023-11-07T03:48:22.143

Link: CVE-2022-33745

cve-icon Redhat

No data.