Improper configuration in block design for Intel(R) MAX(R) 10 FPGA all versions may allow an authenticated user to potentially enable escalation of privilege and information disclosure via physical access.
Metrics
Affected Vendors & Products
References
History
No history.
MITRE
Status: PUBLISHED
Assigner: intel
Published: 2020-03-12T20:52:29
Updated: 2024-08-04T06:02:52.194Z
Reserved: 2019-10-28T00:00:00
Link: CVE-2020-0574
Vulnrichment
No data.
NVD
Status : Analyzed
Published: 2020-03-12T21:15:14.373
Modified: 2021-07-21T11:39:23.747
Link: CVE-2020-0574
Redhat
No data.