The RISC-V Instruction Set Manual contains a documented ambiguity for the Machine Trap Vector Base Address (MTVEC) register that may lead to a vulnerability due to the initial state of the register not being defined, potentially leading to information disclosure, data tampering and denial of service.
Fixes

Solution

No solution given by the vendor.


Workaround

No workaround given by the vendor.

History

No history.

cve-icon MITRE

Status: PUBLISHED

Assigner: nvidia

Published:

Updated: 2024-08-03T15:55:18.614Z

Reserved: 2020-11-12T00:00:00

Link: CVE-2021-1104

cve-icon Vulnrichment

No data.

cve-icon NVD

Status : Modified

Published: 2021-08-13T16:15:07.153

Modified: 2024-11-21T05:43:36.313

Link: CVE-2021-1104

cve-icon Redhat

No data.

cve-icon OpenCVE Enrichment

No data.