CVE-2021-1104

Published Aug 13, 2021 CVSS 3.1 · 9.8 Critical EPSS 1.7% KEV · Not listed
Description
The RISC-V Instruction Set Manual contains a documented ambiguity for the Machine Trap Vector Base Address (MTVEC) register that may lead to a vulnerability due to the initial state of the register not being defined, potentially leading to information disclosure, data tampering and denial of service.

Analysis

No analysis available yet

Remediation

No remediation available yet

Tracking

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Advisories

Source ID Title
EUVD EUVD EUVD-2021-6571 The RISC-V Instruction Set Manual contains a documented ambiguity for the Machine Trap Vector Base Address (MTVEC) register that may lead to a vulnerability due to the initial state of the register not being defined, potentially leading to information disclosure, data tampering and denial of service.
History

No history.

Weaknesses
  • CWE-908

    Use of Uninitialized Resource

Sources

Status
PUBLISHED
Assigner
nvidia
Published
Updated
Aug 3, 2024, 3:55 PM
Reserved
Nov 12, 2020, 12:00 AM
Status
Modified
Published
Aug 13, 2021, 4:15 PM
Modified
Jun 17, 2026, 3:30 AM