parisc: fix a possible DMA corruption
ARCH_DMA_MINALIGN was defined as 16 - this is too small - it may be
possible that two unrelated 16-byte allocations share a cache line. If
one of these allocations is written using DMA and the other is written
using cached write, the value that was written with DMA may be
corrupted.
This commit changes ARCH_DMA_MINALIGN to be 128 on PA20 and 32 on PA1.1 -
that's the largest possible cache line size.
As different parisc microarchitectures have different cache line size, we
define arch_slab_minalign(), cache_line_size() and
dma_get_cache_alignment() so that the kernel may tune slab cache
parameters dynamically, based on the detected cache line size.
Metrics
Affected Vendors & Products
| Source | ID | Title |
|---|---|---|
Debian DLA |
DLA-4008-1 | linux-6.1 security update |
Debian DSA |
DSA-5818-1 | linux security update |
Solution
No solution given by the vendor.
Workaround
No workaround given by the vendor.
Mon, 03 Nov 2025 23:30:00 +0000
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Sun, 13 Jul 2025 13:45:00 +0000
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| Metrics |
epss
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epss
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Fri, 24 Jan 2025 16:45:00 +0000
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| References |
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Thu, 19 Dec 2024 18:45:00 +0000
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Sat, 14 Dec 2024 21:00:00 +0000
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Mon, 02 Dec 2024 08:15:00 +0000
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Wed, 09 Oct 2024 14:45:00 +0000
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| Weaknesses | CWE-665 |
Wed, 09 Oct 2024 14:15:00 +0000
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| First Time appeared |
Linux
Linux linux Kernel |
|
| Weaknesses | NVD-CWE-noinfo | |
| CPEs | cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:* cpe:2.3:o:linux:linux_kernel:6.11:rc1:*:*:*:*:*:* |
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| Vendors & Products |
Linux
Linux linux Kernel |
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| Metrics |
cvssV3_1
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cvssV3_1
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Wed, 11 Sep 2024 13:30:00 +0000
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ssvc
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Wed, 04 Sep 2024 23:30:00 +0000
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| Metrics |
threat_severity
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cvssV3_1
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Wed, 04 Sep 2024 18:45:00 +0000
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| Description | In the Linux kernel, the following vulnerability has been resolved: parisc: fix a possible DMA corruption ARCH_DMA_MINALIGN was defined as 16 - this is too small - it may be possible that two unrelated 16-byte allocations share a cache line. If one of these allocations is written using DMA and the other is written using cached write, the value that was written with DMA may be corrupted. This commit changes ARCH_DMA_MINALIGN to be 128 on PA20 and 32 on PA1.1 - that's the largest possible cache line size. As different parisc microarchitectures have different cache line size, we define arch_slab_minalign(), cache_line_size() and dma_get_cache_alignment() so that the kernel may tune slab cache parameters dynamically, based on the detected cache line size. | |
| Title | parisc: fix a possible DMA corruption | |
| References |
|
Status: PUBLISHED
Assigner: Linux
Published:
Updated: 2025-11-03T22:13:59.062Z
Reserved: 2024-08-21T05:34:56.665Z
Link: CVE-2024-44949
Updated: 2025-11-03T22:13:59.062Z
Status : Modified
Published: 2024-09-04T19:15:30.040
Modified: 2025-11-03T23:15:44.037
Link: CVE-2024-44949
OpenCVE Enrichment
No data.
Debian DLA
Debian DSA