Metrics
Affected Vendors & Products
Wed, 09 Oct 2024 14:45:00 +0000
Type | Values Removed | Values Added |
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Weaknesses | CWE-665 |
Wed, 09 Oct 2024 14:15:00 +0000
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First Time appeared |
Linux
Linux linux Kernel |
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Weaknesses | NVD-CWE-noinfo | |
CPEs | cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:* cpe:2.3:o:linux:linux_kernel:6.11:rc1:*:*:*:*:*:* |
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Vendors & Products |
Linux
Linux linux Kernel |
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Metrics |
cvssV3_1
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cvssV3_1
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Wed, 11 Sep 2024 13:30:00 +0000
Type | Values Removed | Values Added |
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Metrics |
ssvc
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Wed, 04 Sep 2024 23:30:00 +0000
Type | Values Removed | Values Added |
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References |
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Metrics |
threat_severity
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cvssV3_1
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Wed, 04 Sep 2024 18:45:00 +0000
Type | Values Removed | Values Added |
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Description | In the Linux kernel, the following vulnerability has been resolved: parisc: fix a possible DMA corruption ARCH_DMA_MINALIGN was defined as 16 - this is too small - it may be possible that two unrelated 16-byte allocations share a cache line. If one of these allocations is written using DMA and the other is written using cached write, the value that was written with DMA may be corrupted. This commit changes ARCH_DMA_MINALIGN to be 128 on PA20 and 32 on PA1.1 - that's the largest possible cache line size. As different parisc microarchitectures have different cache line size, we define arch_slab_minalign(), cache_line_size() and dma_get_cache_alignment() so that the kernel may tune slab cache parameters dynamically, based on the detected cache line size. | |
Title | parisc: fix a possible DMA corruption | |
References |
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Status: PUBLISHED
Assigner: Linux
Published: 2024-09-04T18:35:49.788Z
Updated: 2024-11-05T09:42:45.893Z
Reserved: 2024-08-21T05:34:56.665Z
Link: CVE-2024-44949
Updated: 2024-09-11T12:42:27.692Z
Status : Analyzed
Published: 2024-09-04T19:15:30.040
Modified: 2024-10-09T13:53:32.513
Link: CVE-2024-44949