Description
Improper handling of overlap between protected memory ranges in some microcode for some Intel(R) Processors within Ring 0: Hypervisor may allow an escalation of privilege. Authorized adversary with a privileged user combined with a low complexity attack may enable escalation of privilege. This result may potentially occur via local access when attack requirements are not present without special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (high), integrity (high) and availability (high) of the vulnerable system, resulting in subsequent system confidentiality (none), integrity (none) and availability (none) impacts.
Published: 2026-08-11
Score: 6.8 Medium
EPSS: < 1% Very Low
KEV: No
Impact: n/a
Action: n/a
AI Analysis

Impact

Improper handling of overlap between protected memory ranges in certain Intel microcode can cause a privilege escalation when a hypervisor executes code at ring 0. The flaw, identified as CWE‑1260, would allow a privileged attacker to gain higher privileges, potentially compromising confidentiality, integrity, and availability of the host system. The advisory does not indicate any additional data‑exfiltration or denial‑of‑service capabilities beyond the privilege jump.

Affected Systems

The vulnerability affects Intel processors that contain the specified microcode updates, although no exact model or firmware revision is listed. Systems running those processors are at risk when a trusted hypervisor is present. Administrators should verify which processor families are running the affected microcode and determine if a patch exists.

Risk and Exploitability

The CVSS score of 6.8 reflects a moderate severity, while the EPSS score of less than 1% suggests a very low likelihood of exploitation in the wild. The flaw requires a privileged user with a hypervisor, is low complexity, and does not need user interaction, so it is a local threat. The vulnerability is not listed in the CISA KEV catalog, and no public exploits are known, but the potential impact remains high if an attacker can gain control.

Generated by OpenCVE AI on August 12, 2026 at 21:43 UTC.

Remediation

No vendor fix or workaround currently provided.

OpenCVE Recommended Actions

  • Apply the latest Intel microcode update that addresses this privilege escalation issue.
  • Limit hypervisor privilege levels and enforce least privilege on all privileged users.
  • Monitor system integrity and hypervisor logs for signs of unauthorized privilege escalation, and validate guest isolation.
  • Review firmware and BIOS updates from Intel and apply any accompanying security patches.

Generated by OpenCVE AI on August 12, 2026 at 21:43 UTC.

Tracking

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Advisories

No advisories yet.

History

Thu, 13 Aug 2026 10:45:00 +0000

Type Values Removed Values Added
First Time appeared Intel
Intel intel Processors
Vendors & Products Intel
Intel intel Processors

Wed, 12 Aug 2026 22:00:00 +0000

Type Values Removed Values Added
Title Privilege Escalation via Improper Memory Range Handling in Intel Microcode

Wed, 12 Aug 2026 16:30:00 +0000

Type Values Removed Values Added
Metrics ssvc

{'options': {'Automatable': 'no', 'Exploitation': 'none', 'Technical Impact': 'partial'}, 'version': '2.0.3'}


Tue, 11 Aug 2026 17:00:00 +0000

Type Values Removed Values Added
Description Improper handling of overlap between protected memory ranges in some microcode for some Intel(R) Processors within Ring 0: Hypervisor may allow an escalation of privilege. Authorized adversary with a privileged user combined with a low complexity attack may enable escalation of privilege. This result may potentially occur via local access when attack requirements are not present without special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (high), integrity (high) and availability (high) of the vulnerable system, resulting in subsequent system confidentiality (none), integrity (none) and availability (none) impacts.
Weaknesses CWE-1260
References
Metrics cvssV4_0

{'score': 6.8, 'vector': 'CVSS:4.0/AV:L/AC:L/AT:N/PR:L/UI:N/VC:N/VI:N/VA:H/SC:N/SI:N/SA:N'}


Subscriptions

Intel Intel Processors
cve-icon MITRE

Status: PUBLISHED

Assigner: intel

Published:

Updated: 2026-08-12T15:47:05.996Z

Reserved: 2025-12-09T04:00:18.771Z

Link: CVE-2026-20760

cve-icon Vulnrichment

Updated: 2026-08-12T15:47:02.838Z

cve-icon NVD

Status : Awaiting Analysis

Published: 2026-08-11T17:17:51.703

Modified: 2026-08-12T20:54:11.500

Link: CVE-2026-20760

cve-icon Redhat

No data.

cve-icon OpenCVE Enrichment

Updated: 2026-08-13T10:30:04Z

Weaknesses
  • CWE-1260

    Improper Handling of Overlap Between Protected Memory Ranges