Description
In the Linux kernel, the following vulnerability has been resolved:

drm/amd/display: Adjust PHY FSM transition to TX_EN-to-PLL_ON for TMDS on DCN35

[Why]
A backport of the change made for DCN401 that addresses an issue where
we turn off the PHY PLL when disabling TMDS output, which causes the
OTG to remain stuck.

The OTG being stuck can lead to a hang in the DCHVM's ability to ACK
invalidations when it thinks the HUBP is still on but it's not receiving
global sync.

The transition to PLL_ON needs to be atomic as there's no guarantee
that the thread isn't pre-empted or is able to complete before the
IOMMU watchdog times out.

[How]
Backport the implementation from dcn401 back to dcn35.

There's a functional difference in when the eDP output is disabled in
dcn401 code so we don't want to utilize it directly.
Published: 2026-05-06
Score: 5.5 Medium
EPSS: < 1% Very Low
KEV: No
Impact: n/a
Action: n/a
AI Analysis

Impact

In the AMD display driver of the Linux kernel, a race condition exists when the physical layer finite state machine transitions from TX_EN to PLL_ON for TMDS on DCN35. The transition is not performed atomically, which can allow the OTG subsystem to remain stuck after TMDS is disabled. This stuck state can prevent the DCHVM from acknowledging invalidations, potentially leading to a kernel hang or system unresponsiveness.

Affected Systems

All Linux kernel installations that include the AMD DCN35 display driver and have not applied the backported DCN401 fix are affected. The issue is present in any kernel version containing the unpatched DCN35 code, regardless of distribution.

Risk and Exploitability

The vulnerability requires the ability to manipulate the driver’s state, such as disabling eDP output, which implies a local or privileged attacker. No remote code execution path is described, and no active exploitation is known. The CVSS score of 5.5 indicates a medium severity, and the EPSS score of <1% indicates a very low probability of exploitation; the vulnerability is not listed in the CISA KEV catalog, suggesting that, while the potential for a system-wide hang exists, exploitation is unlikely without local access.

Generated by OpenCVE AI on May 11, 2026 at 23:12 UTC.

Remediation

No vendor fix or workaround currently provided.

OpenCVE Recommended Actions

  • Apply the upstream kernel patch that backports the DCN401 implementation to DCN35, making the PHY transition to PLL_ON atomic.
  • If a patched kernel is not available, upgrade to a kernel release that contains the fix or await a distribution security update.
  • As a temporary workaround, disable eDP output or configure firmware to keep the PHY powered when disabling TMDS on DCN35 hardware to avoid triggering the hang.
  • Enable monitoring for OTG-related warnings in kernel logs and reboot the system if a hang occurs.

Generated by OpenCVE AI on May 11, 2026 at 23:12 UTC.

Tracking

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Advisories

No advisories yet.

History

Mon, 11 May 2026 21:00:00 +0000

Type Values Removed Values Added
Weaknesses NVD-CWE-noinfo
Metrics cvssV3_1

{'score': 5.5, 'vector': 'CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H'}


Thu, 07 May 2026 04:00:00 +0000

Type Values Removed Values Added
Weaknesses CWE-790

Thu, 07 May 2026 00:15:00 +0000


Wed, 06 May 2026 14:30:00 +0000

Type Values Removed Values Added
Weaknesses CWE-790

Wed, 06 May 2026 12:15:00 +0000

Type Values Removed Values Added
Description In the Linux kernel, the following vulnerability has been resolved: drm/amd/display: Adjust PHY FSM transition to TX_EN-to-PLL_ON for TMDS on DCN35 [Why] A backport of the change made for DCN401 that addresses an issue where we turn off the PHY PLL when disabling TMDS output, which causes the OTG to remain stuck. The OTG being stuck can lead to a hang in the DCHVM's ability to ACK invalidations when it thinks the HUBP is still on but it's not receiving global sync. The transition to PLL_ON needs to be atomic as there's no guarantee that the thread isn't pre-empted or is able to complete before the IOMMU watchdog times out. [How] Backport the implementation from dcn401 back to dcn35. There's a functional difference in when the eDP output is disabled in dcn401 code so we don't want to utilize it directly.
Title drm/amd/display: Adjust PHY FSM transition to TX_EN-to-PLL_ON for TMDS on DCN35
First Time appeared Linux
Linux linux Kernel
CPEs cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:*
Vendors & Products Linux
Linux linux Kernel
References

Subscriptions

Linux Linux Kernel
cve-icon MITRE

Status: PUBLISHED

Assigner: Linux

Published:

Updated: 2026-05-11T22:19:36.402Z

Reserved: 2026-05-01T14:12:55.992Z

Link: CVE-2026-43191

cve-icon Vulnrichment

No data.

cve-icon NVD

Status : Analyzed

Published: 2026-05-06T12:16:37.970

Modified: 2026-05-11T20:51:38.467

Link: CVE-2026-43191

cve-icon Redhat

Severity :

Publid Date: 2026-05-06T00:00:00Z

Links: CVE-2026-43191 - Bugzilla

cve-icon OpenCVE Enrichment

Updated: 2026-05-11T23:15:09Z

Weaknesses