Description
In the Linux kernel, the following vulnerability has been resolved:

iommu/vt-d: Clear Present bit before tearing down context entry

When tearing down a context entry, the current implementation zeros the
entire 128-bit entry using multiple 64-bit writes. This creates a window
where the hardware can fetch a "torn" entry — where some fields are
already zeroed while the 'Present' bit is still set — leading to
unpredictable behavior or spurious faults.

While x86 provides strong write ordering, the compiler may reorder writes
to the two 64-bit halves of the context entry. Even without compiler
reordering, the hardware fetch is not guaranteed to be atomic with
respect to multiple CPU writes.

Align with the "Guidance to Software for Invalidations" in the VT-d spec
(Section 6.5.3.3) by implementing the recommended ownership handshake:

1. Clear only the 'Present' (P) bit of the context entry first to
signal the transition of ownership from hardware to software.
2. Use dma_wmb() to ensure the cleared bit is visible to the IOMMU.
3. Perform the required cache and context-cache invalidation to ensure
hardware no longer has cached references to the entry.
4. Fully zero out the entry only after the invalidation is complete.

Also, add a dma_wmb() to context_set_present() to ensure the entry
is fully initialized before the 'Present' bit becomes visible.
Published: 2026-05-27
Score: 7.5 High
EPSS: < 1% Very Low
KEV: No
Impact: Unpredictable IOMMU context behavior leading to possible spurious faults
Action: Patch Kernel
AI Analysis

Impact

In the Linux kernel, the vt‑d subsystem removes an IOMMU context entry by writing two 64‑bit halves of a 128‑bit entry without first clearing the Present bit. This race can allow the hardware to fetch a partially cleared entry where some fields are zeroed but the Present bit remains set. The result is unpredictable IOMMU behavior or spurious faults, a clear instance of a race condition (CWE‑362, CWE‑367).

Affected Systems

All x86 Linux kernel builds that enable IOMMU and use the vt‑d context‑teardown logic are affected. The advisory shows no explicit version range; therefore, any kernel predating the commit that adds the dma_wmb() ordering and clears the Present bit first may be vulnerable. Verify that your kernel version contains the change referenced in the patch series linked in the CVE. No explicit affected version information is provided in the payload, so the user must determine vulnerability status by inspecting your kernel version against the patch commit.

Risk and Exploitability

The CVSS score of 7.5 indicates high severity. An EPSS score of under 1 % shows a very low probability of exploitation. The vulnerability is not listed in CISA KEV, so no active exploitation is known. Based on the description, it is inferred that the likely attack vector would require an attacker with physical access to a DMA device or control over a device that targets the IOMMU, and would be a local or privilege‑escalation attack that could compromise system reliability. The risk assessment is derived solely from inferred information.

Generated by OpenCVE AI on October 23, 2026 at 02:43 UTC.

Remediation

No solution or workaround provided in the CVE record.

OpenCVE Recommended Actions

  • Upgrade the kernel to a version that implements the vt‑d ownership handshake and dma_wmb() ordering changes to clear the Present bit first
  • If a kernel upgrade is not yet possible, isolate IOMMU‑capable devices by disabling DMA or revoking IOMMU access until the patch is applied
  • As a temporary measure, manually apply the upstream patch that clears the Present bit before tearing it down and rebuild the kernel if no newer kernels are available

Generated by OpenCVE AI on October 23, 2026 at 02:43 UTC.

Tracking

Sign in to view the affected projects.

Advisories
Source ID Title
Debian DLA Debian DLA DLA-4724-1 linux-6.12 new package
Debian DSA Debian DSA DSA-6405-1 linux security update
Ubuntu USN Ubuntu USN USN-8781-1 Linux kernel (NVIDIA Tegra) vulnerabilities
Ubuntu USN Ubuntu USN USN-8917-1 Linux kernel vulnerabilities
Ubuntu USN Ubuntu USN USN-8918-1 Linux kernel (Azure) vulnerabilities
History

Fri, 30 Oct 2026 12:30:00 +0000


Wed, 21 Oct 2026 13:00:00 +0000


Mon, 19 Oct 2026 20:30:00 +0000

Type Values Removed Values Added
Weaknesses CWE-362

Fri, 16 Oct 2026 16:30:00 +0000

Type Values Removed Values Added
Metrics ssvc

{'options': {'Automatable': 'no', 'Exploitation': 'none', 'Technical Impact': 'total'}, 'version': '2.0.3'}


Fri, 24 Jul 2026 18:30:00 +0000


Tue, 16 Jun 2026 06:30:00 +0000

Type Values Removed Values Added
Weaknesses NVD-CWE-noinfo

Sat, 30 May 2026 11:00:00 +0000

Type Values Removed Values Added
Metrics cvssV3_1

{'score': 5.5, 'vector': 'CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H'}

cvssV3_1

{'score': 7.5, 'vector': 'CVSS:3.1/AV:L/AC:H/PR:H/UI:N/S:C/C:H/I:H/A:H'}


Thu, 28 May 2026 16:00:00 +0000

Type Values Removed Values Added
Weaknesses CWE-362
CWE-364

Thu, 28 May 2026 12:15:00 +0000

Type Values Removed Values Added
Weaknesses CWE-367
References
Metrics threat_severity

None

cvssV3_1

{'score': 5.5, 'vector': 'CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H'}

threat_severity

Moderate


Wed, 27 May 2026 17:45:00 +0000

Type Values Removed Values Added
Weaknesses CWE-362
CWE-364

Wed, 27 May 2026 14:15:00 +0000

Type Values Removed Values Added
Description In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Clear Present bit before tearing down context entry When tearing down a context entry, the current implementation zeros the entire 128-bit entry using multiple 64-bit writes. This creates a window where the hardware can fetch a "torn" entry — where some fields are already zeroed while the 'Present' bit is still set — leading to unpredictable behavior or spurious faults. While x86 provides strong write ordering, the compiler may reorder writes to the two 64-bit halves of the context entry. Even without compiler reordering, the hardware fetch is not guaranteed to be atomic with respect to multiple CPU writes. Align with the "Guidance to Software for Invalidations" in the VT-d spec (Section 6.5.3.3) by implementing the recommended ownership handshake: 1. Clear only the 'Present' (P) bit of the context entry first to signal the transition of ownership from hardware to software. 2. Use dma_wmb() to ensure the cleared bit is visible to the IOMMU. 3. Perform the required cache and context-cache invalidation to ensure hardware no longer has cached references to the entry. 4. Fully zero out the entry only after the invalidation is complete. Also, add a dma_wmb() to context_set_present() to ensure the entry is fully initialized before the 'Present' bit becomes visible.
Title iommu/vt-d: Clear Present bit before tearing down context entry
First Time appeared Linux
Linux linux Kernel
CPEs cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:*
Vendors & Products Linux
Linux linux Kernel
References

Subscriptions

Linux Linux Kernel
cve-icon MITRE

Status: PUBLISHED

Assigner: Linux

Published:

Updated: 2026-10-30T12:25:48.827Z

Reserved: 2026-05-13T15:03:33.087Z

Link: CVE-2026-45944

cve-icon Vulnrichment

Updated: 2026-10-16T15:18:31.529Z

cve-icon NVD

Status : Modified

Published: 2026-05-27T14:17:10.677

Modified: 2026-10-30T13:18:54.227

Link: CVE-2026-45944

cve-icon Redhat

Severity : Moderate

Publid Date: 2026-05-27T00:00:00Z

Links: CVE-2026-45944 - Bugzilla

cve-icon OpenCVE Enrichment

Updated: 2026-10-23T02:45:03Z

Weaknesses
  • CWE-362

    Concurrent Execution using Shared Resource with Improper Synchronization ('Race Condition')

  • CWE-367

    Time-of-check Time-of-use (TOCTOU) Race Condition

  • NVD-CWE-noinfo