In the Linux kernel, the vt‑d implementation clears a 128‑bit IOMMU context entry by writing two 64‑bit halves without first clearing the Present bit. When the hardware fetches a partially cleared entry, it sees a "torn" structure—where some fields are already zeroed while the 'Present' bit is still set—leading to unpredictable behavior or spurious faults. This race condition and improper memory ordering (CWE‑367) can cause hardware to miss synchronisation between software and DMA activity.

All Linux kernel builds that include the pre‑patch teardown logic are affected; the patch is applied to kernels after the commit that adds dma_wmb() ordering and clears the Present bit first. Users running x86 kernels with IOMMU enabled should check whether their kernel version predates this change.

The CVSS score is 7.5, a high severity. The EPSS score is below 1 %, indicating an extremely low likelihood of exploitation. The vulnerability is not listed in CISA KEV, so no known active exploitation is reported. Based on the description, it is inferred that an exploit would require control of a DMA device or other IOMMU‑capable hardware, and would be a local attack that could affect normal operation of the IOMMU subsystem.