Description
In the Linux kernel, the following vulnerability has been resolved:

perf: RISC-V: store available counter mask as bitmap

The available-counter mask was a single unsigned long, but iteration
uses RISCV_MAX_COUNTERS, which is 64. On RV32 that reads past the object.
Filling with an unsigned-long bit at index 32 and above is also wrong.

Use DECLARE_BITMAP and set_bit/bitmap helpers. Walk each bitmap word
into CFG_MATCH when checking events, when allocating an index, and when
stopping all counters. Set the counter base to i times BITS_PER_LONG.
Share the CFG_MATCH ecall through a small helper so the 32-bit argument
split is not duplicated. On qemu-system-riscv32 the probe bitmap has bits
above XLEN set, so the first word alone is not enough.

[pjw@kernel.org: updated to apply; fixed checkpatch.pl issues]
Published: 2026-09-25
Score: 5.5 Medium
EPSS: < 1% Very Low
KEV: No
Impact: Information Disclosure
Action: Apply patch
AI Analysis

Impact

The Linux kernel’s performance monitoring subsystem for RISC‑V contains a bug where the available‑counter mask was stored as a single unsigned long, but the code later iterates over a 64‑bit bitmap. On 32‑bit RISC‑V processors this causes the kernel to read and write past the allocated memory. The out‑of‑bounds read/write can expose kernel memory contents, potentially leaking confidential data, or corrupt internal structures, leading to system instability or crashes. The vulnerability is a classic out‑of‑bounds read/write flaw (CWE‑125). The likely attack vector is the perf interface on affected 32‑bit RISC‑V kernels, where a malicious user could supply crafted performance event parameters to trigger the counter mask overflow. Based on the description, it is inferred that an attacker would need local or privileged access to submit such events.

Affected Systems

All 32‑bit RISC‑V builds of the Linux kernel that enable CONFIG_RISCV_PERF and run the perf interface, including any kernel version prior to the commits referenced. No specific version numbers are listed, so all kernels lacking the fix are considered affected.

Risk and Exploitability

The EPSS score is less than 1%, indicating a very low exploitation probability. The CVSS score of 5.5 indicates moderate severity. The vulnerability is not listed in the CISA KEV catalog, suggesting no widely known exploits. However, the defect exists in kernel space, so an attacker with local or privileged access to the perf interface can trigger the out‑of‑bounds read/write. The likely attack vector is through the perf interface on 32‑bit RISC‑V kernels, where an attacker can supply crafted performance event parameters to cause the counter mask overflow. The potential for kernel data leakage or a crash suggests a moderate to high risk for compromised or locally privileged users.

Generated by OpenCVE AI on October 1, 2026 at 09:17 UTC.

Remediation

No solution or workaround provided in the CVE record.

OpenCVE Recommended Actions

  • Update the kernel to a release that incorporates the referenced patches or apply the specific commit changes directly.
  • If a kernel update cannot be performed immediately, rebuild or reconfigure the kernel with CONFIG_RISCV_PERF disabled to remove the vulnerable subsystem.
  • Enforce stricter access controls on the perf interface, such as sandboxing, SELinux or AppArmor rules, or container isolation, to limit which processes may invoke perf events on affected systems.

Generated by OpenCVE AI on October 1, 2026 at 09:17 UTC.

Tracking

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Advisories
Source ID Title
Debian DLA Debian DLA DLA-4817-1 linux-6.12 security update
Debian DSA Debian DSA DSA-6528-1 linux security update
History

Tue, 29 Sep 2026 20:00:00 +0000

Type Values Removed Values Added
Weaknesses CWE-124
CWE-787

Tue, 29 Sep 2026 13:15:00 +0000

Type Values Removed Values Added
Weaknesses CWE-125
References
Metrics threat_severity

None

cvssV3_1

{'score': 5.5, 'vector': 'CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:N/A:H'}

threat_severity

Moderate


Fri, 25 Sep 2026 23:30:00 +0000

Type Values Removed Values Added
Weaknesses CWE-124
CWE-787

Fri, 25 Sep 2026 10:30:00 +0000

Type Values Removed Values Added
Description In the Linux kernel, the following vulnerability has been resolved: perf: RISC-V: store available counter mask as bitmap The available-counter mask was a single unsigned long, but iteration uses RISCV_MAX_COUNTERS, which is 64. On RV32 that reads past the object. Filling with an unsigned-long bit at index 32 and above is also wrong. Use DECLARE_BITMAP and set_bit/bitmap helpers. Walk each bitmap word into CFG_MATCH when checking events, when allocating an index, and when stopping all counters. Set the counter base to i times BITS_PER_LONG. Share the CFG_MATCH ecall through a small helper so the 32-bit argument split is not duplicated. On qemu-system-riscv32 the probe bitmap has bits above XLEN set, so the first word alone is not enough. [pjw@kernel.org: updated to apply; fixed checkpatch.pl issues]
Title perf: RISC-V: store available counter mask as bitmap
First Time appeared Linux
Linux linux Kernel
CPEs cpe:2.3:o:linux:linux_kernel:*:*:*:*:*:*:*:*
Vendors & Products Linux
Linux linux Kernel
References

Subscriptions

Linux Linux Kernel
cve-icon MITRE

Status: PUBLISHED

Assigner: Linux

Published:

Updated: 2026-09-25T10:22:06.177Z

Reserved: 2026-09-24T16:01:01.157Z

Link: CVE-2026-97587

cve-icon Vulnrichment

No data.

cve-icon NVD

Status : Received

Published: 2026-09-25T11:17:09.880

Modified: 2026-09-25T11:17:09.880

Link: CVE-2026-97587

cve-icon Redhat

Severity : Moderate

Publid Date: 2026-09-25T00:00:00Z

Links: CVE-2026-97587 - Bugzilla

cve-icon OpenCVE Enrichment

Updated: 2026-10-01T09:30:05Z

Weaknesses